 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MC10EL34, MC100EL34 5V ECL /2, /4, /8 Clock Generation Chip The MC10/100EL34 is a low skew /2, /4, /8 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The common enable (EN) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between the internal divider stages. The internal enable flip-flop is clocked on the falling edge of the input clock, therefore, all associated specification limits are referenced to the negative edge of the clock input. Upon startup, the internal flip-flops will attain a random state; the master reset (MR) input allows for the synchronization of the internal dividers, as well as multiple EL34s in a system. The 100 Series contains temperature compensation. http://onsemi.com MARKING DIAGRAMS 16 SO-16 D SUFFIX CASE 751B 1 16 10EL34 AWLYWW 1 16 100EL34 AWLYWW 1 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device MC10EL34D MC10EL34DR2 MC100EL34D MC100EL34DR2 Package SO-16 SO-16 SO-16 SO-16 Shipping 48 Units / Rail 2500 Units / Reel 48 Units / Rail 2500 Units / Reel * * * * * * 50 ps Output-to-Output Skew Synchronous Enable/Disable Master Reset for Synchronization ESD Protection: > 1 KV HBM, > 100 V MM PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V Internal Input Pulldown Resistors on CLK(s), EN, and MR Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test * * * Moisture Sensitivity Level 1 Oxygen Index 28 to 34 * Flammability Rating: UL-94 code V-0 @ 1/8", * Transistor Count = 191 devices For Additional Information, see Application Note AND8003/D (c) Semiconductor Components Industries, LLC, 2000 1 October, 2000 - Rev. 3 Publication Order Number: MC10EL34/D MC10EL34, MC100EL34 LOGIC DIAGRAM AND PINOUT ASSIGNMENT VCC 16 EN 15 D Q /2 Q R NC CLK 14 R /4 Q R /8 13 CLK VBB 12 11 MR 10 VEE 9 FUNCTION TABLE CLK* Z ZZ X EN* L H X MR* L L H FUNCTION Divide Hold Q0-3 Reset Q0-3 Q R 1 Q0 2 Q0 3 VCC 4 Q1 5 Q1 6 VCC 7 Q2 8 Q2 Z = Low-to-High Transition ZZ = High-to-Low Transition * Pins will default low when left open. * All VCC pins are tied together on the die. Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. PIN DESCRIPTION PIN CLK, CLK EN MR Q0, Q0 Q1, Q1 Q2, Q2 VBB VCC VEE NC FUNCTION ECL Diff Clock Inputs ECL Sync Enable ECL Master Reset ECL Diff /2 Outputs ECL Diff /4 Outputs ECL Diff /8 Outputs Reference Voltage Output Positive Supply Negative Supply No Connect MAXIMUM RATINGS (Note 1.) Symbol VCC VEE VI Iout IBB TA Tstg JA JC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage C ode u o age NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction to Ambient) Thermal Resistance (Junction to Case) Wave Solder 0 LFPM 500 LFPM std bd <2 to 3 sec @ 248C 16 SOIC 16 SOIC 16 SOIC Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 8 -8 6 -6 50 100 0.5 -40 to +85 -65 to +150 130 75 33 to 36 265 Units V V V V mA mA mA C C C/W C/W C/W C 1. Maximum Ratings are those values beyond which device damage may occur. http://onsemi.com 2 MC10EL34, MC100EL34 10EL SERIES PECL DC CHARACTERISTICS VCC= 5.0 V; VEE= 0.0 V (Note 1.) -40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage (Single Ended) Input LOW Voltage (Single Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 3.) Input HIGH Current Input LOW Current 0.5 3920 3050 3770 3050 3.57 3.0 4010 3200 Min Typ Max 39 4110 3350 4110 3500 3.7 4.6 150 0.5 4020 3050 3870 3050 3.65 3.0 4105 3210 Min 25C Typ Max 39 4190 3370 4190 3520 3.75 4.6 150 0.3 4090 3050 3940 3050 3.69 3.0 4185 3227 Min 85C Typ Max 39 4280 3405 4280 3555 3.81 4.6 150 Unit mA mV mV mV mV V V A A NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.06 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. 10EL SERIES NECL DC CHARACTERISTICS VCC= 0.0 V; VEE= -5.0 V (Note 1.) -40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage (Single Ended) Input LOW Voltage (Single Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 3.) Input HIGH Current Input LOW Current 0.5 -1080 -1950 -1230 -1950 -1.43 -2.0 -990 -1800 Min Typ Max 39 -890 -1650 -890 -1500 -1.30 -0.4 150 0.5 -980 -1950 -1130 -1950 -1.35 -2.0 -895 -1790 Min 25C Typ Max 39 -810 -1630 -810 -1480 -1.25 -0.4 150 0.3 -910 -1950 -1060 -1950 -1.31 -2.0 -815 -1773 Min 85C Typ Max 39 -720 -1595 -720 -1445 -1.19 -0.4 150 Unit mA mV mV mV mV V V A A NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.06 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. http://onsemi.com 3 MC10EL34, MC100EL34 100EL SERIES PECL DC CHARACTERISTICS VCC= 5.0 V; VEE= 0.0 V (Note 1.) -40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage (Single Ended) Input LOW Voltage (Single Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 3.) Input HIGH Current Input LOW Current 0.5 3915 3170 3835 3190 3.62 2.2 3995 3305 Min Typ Max 39 4120 3445 4120 3525 3.74 4.6 150 0.5 3975 3190 3835 3190 3.62 2.2 4045 3295 Min 25C Typ Max 39 4120 3380 4120 3525 3.74 4.6 150 0.5 3975 3190 3835 3190 3.62 2.2 4050 3295 Min 85C Typ Max 42 4120 3380 4120 3525 3.74 4.6 150 Unit mA mV mV mV mV V V A A NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. 100EL SERIES NECL DC CHARACTERISTICS VCC= 0.0 V; VEE= -5.0 V (Note 1.) -40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage (Single Ended) Input LOW Voltage (Single Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 3.) Input HIGH Current Input LOW Current 0.5 -1085 -1830 -1165 -1810 -1.38 -2.8 -1005 -1695 Min Typ Max 39 -880 -1555 -880 -1475 -1.26 -0.4 150 0.5 -1025 -1810 -1165 -1810 -1.38 -2.8 -955 -1705 Min 25C Typ Max 39 -880 -1620 -880 -1475 -1.26 -0.4 150 0.5 -1025 -1810 -1165 -1810 -1.38 -2.8 -955 -1705 Min 85C Typ Max 42 -880 -1620 -880 -1475 -1.26 -0.4 150 Unit mA mV mV mV mV V V A A NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. http://onsemi.com 4 MC10EL34, MC100EL34 AC CHARACTERISTICS VCC= 5.0 V; VEE= 0.0 V or VCC= 0.0 V; VEE= -5.0 V (Note 1.) -40C Symbol fmax tPLH tPHL tSKEW tJITTER tS tH tRR VPP tr tf Characteristic Maximum Toggle Frequency Propagation Delay to Output CLK to Q0 CLK to Q1,2 MR to Q 960 900 750 100 TBD 400 250 400 150 275 200 1000 525 400 250 400 150 275 200 1000 525 Min Typ TBD 1200 1140 1060 960 900 750 100 TBD 400 250 400 150 275 200 1000 525 Max Min 25C Typ TBD 1200 1140 1060 970 910 790 100 TBD Max Min 85C Typ TBD 1210 1150 1090 Max Unit GHz ps Within-Device Skew (Note 2.) Cycle-to-Cycle Jitter Setup Time EN Hold Time EN Set/Reset Recovery Input Swing (Note 3.) Output Rise/Fall Times Q (20% - 80%) ps ps ps ps ps mV ps 1. 10 Series: VEE can vary +0.06 V / -0.5 V. 100 Series: VEE can vary +0.8 V / -0.5 V. 2. Within-device skew is defined as identical transitions on similar paths through a device. 3. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40. tRR Internal Clock Disabled Internal Clock Enabled RESET CLK Q0 Q1 Q2 EN The EN signal will freeze the internal clocks to the flip-flops on the first falling edge of CLK after its assertion. The internal dividers will maintain their state during the internal clock freeze and will return to clocking once the internal clocks are unfrozen. The outputs will transition to their next states in the same manner, time and relationship as they would have had the EN signal not been asserted. Figure 1. Timing Diagram http://onsemi.com 5 MC10EL34, MC100EL34 Q Driver Device Qb 50 W 50 W D Receiver Device Db V TT V TT = V CC - 2.0 V Figure 2. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020 - Termination of ECL Logic Devices.) Resource Reference of Application Notes AN1404 - ECLinPS Circuit Performance at Non-Standard VIH Levels AN1405 AN1406 AN1503 AN1504 AN1560 AN1568 AN1596 AN1650 AN1672 AND8001 AND8002 AND8020 - - - - - - - - - - - - ECL Clock Distribution Techniques Designing with PECL (ECL at +5.0 V) ECLinPS I/O SPICE Modeling Kit Metastability and the ECLinPS Family Low Voltage ECLinPS SPICE Modeling Kit Interfacing Between LVDS and ECL ECLinPS Lite Translator ELT Family SPICE I/O Model Kit Using Wire-OR Ties in ECLinPS Designs The ECL Translator Guide Odd Number Counters Design Marking and Date Codes Termination of ECL Logic Devices http://onsemi.com 6 MC10EL34, MC100EL34 PACKAGE DIMENSIONS SO-16 D SUFFIX CASE 751B-05 ISSUE J -A - 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 7 0 0.229 0.244 0.010 0.019 -B - 1 8 P 8 PL 0.25 (0.010) M B M G F K C -T SEATING - PLANE R X 45 D 16 PL 0.25 (0.010) M M J T B S A S http://onsemi.com 7 MC10EL34, MC100EL34 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (Mon-Fri 2:30pm to 7:00pm CET) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (Mon-Fri 2:00pm to 7:00pm CET) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (Mon-Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, UK, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com Toll-Free from Mexico: Dial 01-800-288-2872 for Access - then Dial 866-297-9322 ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MC10EL34/D |
Price & Availability of MC10EL34DR2
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |